Uc1844 pdf

The corresponding thresholds for the UC and UC are 8. Note 2: Toggle flip flop used only in and Self Limiting Output Current. All currents are positive into the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Stability Note 2 Note 7 0.

Note 2 4. Output frequency is one half oscillator frequency for the UC and UC Note that the extremes in voltage do not necessarily occur at the extremes in temperature.

Pin 6 should currents. The transistor and 5k potentiometer cessitate careful grounding techniques. Timing and by- are used to sample the oscillator waveform and apply pass capacitors should be connected close to pin 5 in a an adjustable ramp to pin 3. In one example, an externally latched a voltage two diode drops above ground. Either method shutdown may be accomplished by adding an SCR causes the output of the PWM comparator to be high which will be reset by cycling VCC below the lower refer to block diagram.

At this point the reference turns off, al- nant so that the output will remain low until the next lowing the SCR to reset. Output Voltage: 1. Line Isolation V B. Switching Frequency 40kHz C. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

Samples may or may not be available. Once obtained, Figure 9 is used to pinpoint the nearest standard value of CT for a given deadtime. Next, the appropriate RT value is interpolated using the parameters for CT and oscillator frequency. The timing resistor can be cal- culated from the following formula. Therefore, their oscillators must be set to run at twice the desired power supply switching frequency.

Under normal flop. This duty cycle clamp is advantageous in most fly- operation the peak voltage across Rs is controlled by the back and forward converters. If unattenuated, this transient can prema- turely terminate the output pulse. As shown, a simple RC filter is usually adequate to suppress this spike. The RC time constant should be approximately equal to the cur- rent spike duration usually a few hundred nanoseconds.

The inverting input to the UC current-sense compara- tor is internally clamped to 1V Figure Current limiting occurs if the voltage at pin 3 reaches this threshold value, i. The non-inverting input is not brought out to a pin, but is internally biased to 2. RI and RF fix the low- Figure Compensation frequency gain. This technique insures converter stability while providing good dynamic response.

Limiting the peak current through the IC is accomplished It is therefore desirable to keep the value of RI, as low as by placing a resistor between the totem-pole output and possible. The use of a Schottky diode from the PWM output to Continuous-inductor-current boost and flyback converters ground will prevent the output voltage from going exces- each have a right-half-plane zero in their transfer function.

To An additional compensation pole is needed to roll off loop be effective, the diode selected should have a forward gain at a frequency less than that of the RHP zero.

Rp drop of less than 0. Most l- to 3-amp and Cp in the circuit of Figure 16 provide this pole. Schottky diodes exhibit these traits above room tempera- ture. Implementation of the complete drive scheme is shown in the following di- The UC PWM has a single totem-pole output which agrams. The ringing Figure 19 shows an isolated MOSFET drive circuit which below ground is greatly enhanced by the transformer leak- is appropriate when the drive signal must be level shifted age inductance and parasitic capacitance, in addition to or transmitted across an isolation boundary.

Bipolar tran- the magnetizing inductance and FET gate capacitance. Resistors R1 and R2 fix the on-state base current while capacitor Cl provides a negative base current pulse Figures 18, 19 and 20 show suggested circuits for driving to remove stored charge at turn-off. It also provides damping bridge topologies. The UC dual output driver with in- for a parasitic tank circuit formed by the FET input capaci- ternal toggle flip-flop performs this function.

A circuit ex- tance and series wiring inductance. Schottky diode D1 ample at the end of this paper illustrates a typical applica- prevents the output of the IC from going far below ground tion for these two ICs. Increased drive capability for driv- during turn-off. A Schottky diode clamp from ground to pin 6 will prevent such output noise from feed- As mentioned earlier, noise on the current sense or con- ing to the oscillator.

If these measures fail to correct the trol signals can cause significant pulse-width jitter, particu- probelm, the oscillator frequency can always be stabilized larly with continuous-inductor-current designs. While slope with an external clock. Here tion is to minimize the amount of noise. In general, noise the oscillator is much more immune to noise because the immunity improves as impedances decrease at critical ramp voltage never closely approaches the internal points in a circuit.

One such point for a switching supply is the ground line. Rath- modulating IC. A copper ground plane and separate return er than bring CT to ground directly, a small resistor is lines for high-current paths greatly reduce common-mode placed in series with CT to ground. This resistor serves as noise. Note that the UC has a single ground pin. PDF , Kb , Archivo publicado: sept 5, The fundamental challenge of power supply design is to realize simultaneously two conflicting objectives: good electrical performance and low cost.

These inexpensive IC controllers provide all the performance advantages of current-mode operation. In addition the UC series is optimized for efficient power-sequencing of. Simplified equations are used to develop obtainable ranges for parameters over IC tolerances.

Providing the necessary features to control current-mode switched-mode power supplies this device has been improved for higher frequency off-line power supplies.

This design note describes a circuit with low startup current less than 0. Since these devices have traditionally used relatively high-voltage 35V bipolar processes powering was not a concern.